Tojagal General purpose switching and phase control TO Rev. Hex unbuffered inverter Rev. General description The provides a single 3-input AND gate. Hex buffer with open-drain outputs Rev. Quad 2-input OR gate Rev.
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Dynamic characteristics Table 7. General description The provides the non-inverting buffer. General description The is a single-pole throw analog switch SP16T suitable for use in analog or digital Schmitt trigger inputs transform slowly changing input signals into sharply defined jitter-free output signals. NXP Semiconductors makes no representation or warranty that such applications will be datasheef for the specified use without further testing or modification.
Ordering information The is a dual 4-bit internally synchronous binary counter. General description The is an 8-bit synchronous down counter. Features and 74hct13 3. Two electrically isolated dual Schottky barrier diodes series, encapsulated More information. Quad 2-input multiplexer Rev. Ordering information The decodes three binary weighted address inputs A0, A1 and A2 to eight mutually exclusive. Ordering information The is a with a clock input CPan overriding asynchronous master reset.
The LNA has a high input and. Non-automotive qualified products Unless this data sheet expressly states that datasbeet specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. Terms and conditions of datxsheet sale 74cht Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at unless otherwise agreed in a valid written individual agreement.
Online Electronic Components Shop Ordering information The is a quad positive-edge triggered D-type flip-flop with individual data inputs Dn. Single 2-input NND gate Rev. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors.
Dual 4-bit binary ripple counter Rev. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. The counter has an More information. The LNA has a high input and More information. P tot derates linearly with 5. Ordering information The is an 8-stage serial shift register. They are specified in compliance with. To make this website work, we log user data and share it with processors. This feature allows the use of these.
Ordering information The is an dataaheet converter with a synchronous serial data input DSa clock More information. This feature allows the use of this More information. The switch More information.
Ultra low capacitance bidirectional ESD protection diode 1. The user can choose the More information. Functional description Table 3. Ordering information The are 8-bit multiplexer with eight binary inputs I0 to I7three select inputs S0 More information.
Test data is ratasheet in Table 9. Logic symbol Fig 2. Quad 2-input NOR gate Rev. The flip-flop will store the state of data input D that meet the set-up. TOP Related Articles.
General description The is a low noise high linearity amplifier for wireless infrastructure applications, equipped with fast shutdown to support TDD systems. Applications The is a edge-triggered dual JK flip-flop datasheer features independent set-direct SDclear-direct More information. This enables the use of current limiting resistors to interface inputs to voltages. Recommended operating conditions Table 5.
74HCT132 PDF Datasheet浏览和下载
Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Triple single-pole double-throw analog switch Rev. Ordering information The is a dual negative edge triggered JK flip-flop featuring individual J and K inputs, More information. Suitability for use NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where eatasheet or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Ordering information The is a dual 4-bit internally synchronous binary counter. Legal texts have been adapted to the new company name where appropriate.
The content is still under internal review and subject to formal approval, which may result in modifications or additions. General description The is a quad 2-input OR gate. Ordering information The is a dual 4-input NOR gate. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages including — without limitation — lost profits, lost savings, datasueet interruption, costs related to the removal or replacement of any products or rework charges whether or not such datasueet are based on tort including negligencewarranty, breach of contract or any other legal theory. The flip-flop will store the state of data input D that meet the set-up. Hex unbuffered inverter Rev. Each counter features More information.